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Ultralow Power, Rail-to-Rail Output Operational Amplifiers OP281/OP481
FEATURES
Low supply current: 4 A/amplifier maximum Single-supply operation: 2.7 V to 12 V Wide input voltage range Rail-to-rail output swing Low offset voltage: 1.5 mV No phase reversal
PIN CONFIGURATIONS
OUT A 1 -IN A 2
8
V+
APPLICATIONS
Comparator Battery-powered instrumentation Safety monitoring Remote sensors Low voltage strain gage amplifiers
OUT A -IN A +IN A V-
1
Figure 1. 8-Lead Narrow-Body SOIC (R Suffix)
8
V+ OUT B -IN B +IN B
00291-002
2 3 4
OP281
TOP VIEW (Not to Scale)
7 6 5
GENERAL DESCRIPTION
The OP281 and OP481 are dual and quad ultralow power single-supply amplifiers featuring rail-to-rail outputs. Each operates from supplies as low as 2.0 V and is specified at +3 V and +5 V single supplies as well as 5 V dual supplies. Fabricated on Analog Devices' CBCMOS process, the OP281/OP481 feature a precision bipolar input and an output that swings to within millivolts of the supplies, continuing to sink or source current up to a voltage equal to the supply voltage. Applications for these amplifiers include safety monitoring, portable equipment, battery and power supply control, and signal conditioning and interfacing for transducers in very low power systems. The output's ability to swing rail-to-rail and not increase supply current when the output is driven to a supply voltage enables the OP281/OP481 to be used as comparators in very low power systems. This is enhanced by their fast saturation recovery time. Propagation delays are 250 s. The OP281/OP481 are specified over the extended industrial temperature range (-40C to +85C). The OP281 dual amplifier is available in 8-lead SOIC surface-mount and TSSOP packages. The OP481 quad amplifier is available in narrow 14-lead SOIC and TSSOP packages.
Figure 2. 8-Lead TSSOP (RU Suffix)
OUT A 1 -IN A 2 +IN A 3 V+ 4
14 OUT D 13 -IN D
OP481
12 +IN D
11 V- TOP VIEW (Not to Scale) 10 +IN C +IN B 5
00291-003
00291-004
-IN B 6 OUT B 7
9 8
-IN C OUT C
Figure 3. 14-Lead Narrow-Body SOIC (R Suffix)
OUT A -IN A +IN A V+ +IN B -IN B OUT B
1 2 3 4 5 6 7 14 OUT D 13 -IN D 12 +IN D OP481 TOP VIEW 11 V- (Not to Scale) 10 +IN C 9 8
-IN C OUT C
Figure 4. 14-Lead TSSOP (RU Suffix)
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)1996-2007 Analog Devices, Inc. All rights reserved.
00291-001
OUT B TOP VIEW +IN A 3 (Not to Scale) 6 -IN B 5 +IN B V- 4
7
OP281
OP281/OP481 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications....................................................................................... 1 Pin Configurations ........................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Specifications............................................................... 3 Absolute Maximum Ratings............................................................ 6 Thermal Resistance ...................................................................... 6 ESD Caution.................................................................................. 6 Typical Performance Characteristics ............................................. 7 Applications..................................................................................... 13 Theory of Operation .................................................................. 13 Input Overvoltage Protection ................................................... 13 Input Offset Voltage ................................................................... 13 Input Common-Mode Voltage Range ..................................... 13 Capacitive Loading..................................................................... 14 Micropower Reference Voltage Generator.............................. 14 Window Comparator................................................................. 14 Low-Side Current Monitor ....................................................... 15 Low Voltage Half-Wave and Full-Wave Rectifiers................. 15 Battery-Powered Telephone Headset Amplifier..................... 15 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 18
REVISION HISTORY
10/07--Rev. B to Rev. C Updated Format..................................................................Universal Changes to Offset Voltage Drift Condition .................................. 3 Changes to Slew Rate Symbol ......................................................... 5 Changes to Figure 8.......................................................................... 7 Deleted SPICE Macro-Model Section ......................................... 13 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 18 3/03--Rev. A to Rev. B Changes to Features.......................................................................... 1 2/03--Rev. 0 to Rev. A Updated Format..................................................................Universal Deleted OP181 ....................................................................Universal Updated Package Options .................................................Universal Deleted OP181 Pin Configurations ................................................1 Deleted Epoxy DIP Pin Configurations .........................................1 Changes to Absolute Maximum Ratings........................................5 Changes to Ordering Guide .............................................................5 Changes to Input Offset Voltage................................................... 10 Deleted Former Figure 33 ............................................................. 10 Deleted Overdrive Recovery Time Section................................. 11 Deleted Former Figure 36 ............................................................. 11 Deleted 8-Lead and 14-Lead Plastic DIP (N-8 and N-14) Outline Dimensions ....................................................................... 14 Updated Outline Dimensions....................................................... 14
Rev. C | Page 2 of 20
OP281/OP481 SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
VS = 3.0 V, VCM = 1.5 V, TA = 25C, unless otherwise noted. Table 1.
Parameter INPUT CHARACTERISTICS Offset Voltage 1 Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large-Signal Voltage Gain Offset Voltage Drift Bias Current Drift Offset Current Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Limit POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Turn-On Time Saturation Recovery Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
1
Symbol VOS IB IOS CMRR AVO VOS/T IB/T IOS/T VOH VOL ISC PSRR ISY
Condition
Min
Typ
Max 1.5 2.5 10 7 2
Unit mV mV nA nA V dB V/mV V/mV V/C pA/C pA/C V mV mA dB A A V/ms s s s kHz Degrees V p-p nV/Hz pA/Hz
-40C TA +85C -40C TA +85C -40C TA +85C VCM = 0 V to 2.0 V, -40C TA +85C RL = 1 M, VO = 0.3 V to 2.7 V -40C TA +85C -40C to +85C 0 65 5 2
3 0.1 95 13 10 20 2 2.925 2.96 25 1.1 95 3
RL = 100 k to GND, -40C TA +85C RL = 100 k to V+, -40C TA +85C
75
VS = 2.7 V to 12 V, -40C TA +85C VO = 0 V -40C TA +85C RL = 100 k, CL = 50 pF AV = 1, VO = 1 V AV = 20, VO = 1 V
76
4 5
SR
GBP M en p-p en in 0.1 Hz to 10 Hz f = 1 kHz
25 40 50 65 95 70 10 75 <1
VOS is tested under a no load condition.
Rev. C | Page 3 of 20
OP281/OP481
VS = 5.0 V, VCM = 2.5 V, TA = 25C, unless otherwise noted. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage 1 Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large-Signal Voltage Gain Offset Voltage Drift Bias Current Drift Offset Current Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Limit POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Saturation Recovery Time Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
1
Symbol VOS IB IOS CMRR AVO VOS/T IB/T IOS/T VOH VOL ISC PSRR ISY
Condition
Min
Typ 0.1
Max 1.5 2.5 10 7 4
Unit mV mV nA nA V dB V/mV V/mV V/C pA/C pA/C V mV mA dB A A V/ms s kHz Degrees V p-p nV/Hz pA/Hz
-40C TA +85C -40C TA +85C -40C TA +85C VCM = 0 V to 4.0 V, -40C TA +85C RL = 1 M, VO = 0.5 V to 4.5 V -40C TA +85C -40C to +85C 0 65 5 2
3 0.1 90 15 10 20 2 4.925 4.96 25 3.5 95 3.2
RL = 100 k to GND, -40C TA +85C RL = 100 k to V+, -40C TA +85C
75
VS = 2.7 V to 12 V, -40C TA +85C VO = 0 V -40C TA +85C RL = 100 k, CL = 50 pF
76
4 5
SR GBP M en p-p en in
27 120 100 74 10 75 <1
0.1 Hz to 10 Hz f = 1 kHz
VOS is tested under a no load condition.
Rev. C | Page 4 of 20
OP281/OP481
VS = 5.0 V, TA = +25C, unless otherwise noted. Table 3.
Parameter INPUT CHARACTERISTICS Offset Voltage 1 Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Large-Signal Voltage Gain Offset Voltage Drift Bias Current Drift Offset Current Drift OUTPUT CHARACTERISTICS Output Voltage Swing Short-Circuit Limit POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density
1
Symbol VOS IB IOS CMRR AVO VOS/T IB/T IOS/T VO ISC PSRR ISY
Condition
Min
Typ 0.1
Max 1.5 2.5 10 7 +4
Unit mV mV nA nA V dB V/mV V/mV V/C pA/C pA/C V mA dB A A V/ms kHz Degrees V p-p nV/Hz nV/Hz pA/Hz
-40C TA +85C -40C TA +85C -40C TA +85C VCM = -5.0 V to +4.0 V, -40C TA +85C RL = 1 M, VO = 4.0 V, -40C TA +85C -40C to +85C -5 65 5 2
3 0.1 95 13 10 20 2 4.925 4.98 12 95 3.3
RL = 100 k to GND, -40C TA +85C
VS = 1.35 V to 6 V, -40C TA +85C VO = 0 V -40C TA +85C RL = 100 k, CL = 50 pF
76
5 6
SR GBP M en p-p en in
28 105 75 10 85 75 <1
0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz
VOS is tested under a no load condition.
Rev. C | Page 5 of 20
OP281/OP481 ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature Range (Soldering, 60 sec) Rating 16 V GND to VS + 10 V 3.5 V Indefinite -65C to +150C -40C to +85C -65C to +150C 300C
THERMAL RESISTANCE
Table 5. Thermal Resistance
Package Type 8-Lead SOIC (R Suffix) 8-Lead TSSOP (RU Suffix) 14-Lead SOIC (R Suffix) 14-Lead TSSOP (RU Suffix)
1
JA1 158 240 120 240
JC 43 43 36 43
Unit C/W C/W C/W C/W
JA is specified for the worst-case conditions, that is, JA is specified for device soldered in circuit board for TSSOP and SOIC packages.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Rev. C | Page 6 of 20
OP281/OP481 TYPICAL PERFORMANCE CHARACTERISTICS
45 40 35
QUANTITY (Amplifiers)
VS = 2.7V TA = 25C
0 -0.5 -1.0
VS = 5V
INPUT BIAS CURRENT (nA)
00291-005
30 25 20 15 10 5 0 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0
-1.5 -2.0 -2.5 -3.0 -3.5 -4.0 -4.5
00291-008
00291-010 00291-009
-5.0 -40
-20
0
INPUT OFFSET VOLTAGE (mV)
20 40 60 80 TEMPERATURE (C)
100
120
Figure 5. Input Offset Voltage Distribution
Figure 8. Input Bias Current vs. Temperature
50 45 40 35 30 25 20 15 10 5
VS = 5V TA = 25C
1.0 0.5 INPUT BIAS CURRENT (nA) 0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0 -3.5 0
VS = 5V TA = 25C
QUANTITY (Amplifiers)
INPUT OFFSET VOLTAGE (mV)
00291-006
0
-1.0 -0.8 -0.6 -0.4 -0.2
0
0.2
0.4
0.6
0.8
1.0
0.5
1.0
1.5 2.0 2.5 3.0 3.5 4.0 COMMON-MODE VOLTAGE (V)
4.5
5.0
Figure 6. Input Offset Voltage Distribution
Figure 9. Input Bias Current vs. Common-Mode Voltage
2000 1800
VS = 5V
0.5 0.4 INPUT OFFSET CURRENT (nA) 0.3 0.2 0.1 0 -0.1 -0.2 -0.3
VS = 5V
INPUT OFFSET VOLTAGE (V)
1600 1400 1200 1000 800 600 400 200 -20 0 20 40 60 80 TEMPERATURE (C) 100 120
00291-007
0 -40
-0.4 -40
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
Figure 7. Input Offset Voltage vs. Temperature
Figure 10. Input Offset Current vs. Temperature
Rev. C | Page 7 of 20
OP281/OP481
10000 VS = 3V TA = 25C 70 60 50
OPEN-LOOP GAIN (dB)
VS = 5V TA = 25C RL = 100k
1000
OUTPUT VOLTAGE (mV)
40 30 20 10 0 -10 -20
0 45 90 135 180 225 270 1k 10k FREQUENCY (Hz) 100k 1M
00291-014 00291-016
100 SOURCE 10 SINK
1
1
10
100
1000
LOAD CURRENT (A)
Figure 11. Output Voltage to Supply Rail vs. Load Current
00291-011
0.1
-30 100
Figure 14. Open-Loop Gain and Phase vs. Frequency
1000
VS = 5V TA = 25C
70 60 50
VS = 3V TA = 25C RL = 100k
OUTPUT VOLTAGE (mV)
OPEN-LOOP GAIN (dB)
100
40 30 20 10 0 -10 -20
0 45 90 135 180 225 270 1k 10k FREQUENCY (Hz) 100k 1M
00291-015
SOURCE 10 SINK
1
1
10
100
1000
LOAD CURRENT (A)
Figure 12. Output Voltage to Supply Rail vs. Load Current
00291-012
0.1
-30 100
Figure 15. Open-Loop Gain and Phase vs. Frequency
1000
VS = 5V TA = 25C
70 60 50
VS = 2.7V TA = 25C RL = 100k
OUTPUT VOLTAGE (mV)
OPEN-LOOP GAIN (dB)
100
40 30 20 10 0 -10 -20
0 45 90 135 180 225 270 1k 10k FREQUENCY (Hz) 100k 1M
SOURCE 10 SINK
1
1
10
100
1000
LOAD CURRENT (A)
Figure 13. Output Voltage to Supply Rail vs. Load Current
00291-013
0.1
-30 100
Figure 16. Open-Loop Gain and Phase vs. Frequency
Rev. C | Page 8 of 20
PHASE SHIFT (Degrees)
PHASE SHIFT (Degrees)
PHASE SHIFT (Degrees)
OP281/OP481
70 60 50 VS = 5V TA = 25C RL = 100k TO GROUND
90 80 70 VS = 5V TA = 25C
OPEN-LOOP GAIN (dB)
40 30 20 10 0 -10 -20 -30 100 1k 10k FREQUENCY (Hz) 100k
0
CMRR (dB)
60
VS = +5V VS = +3V
45 90 135 180 225 270
PHASE SHIFT (Degrees)
50 40 30 20 10 0
00291-017
1M
1k
10k
100k FREQUENCY (Hz)
1M
10M
Figure 17. Open-Loop Gain and Phase vs. Frequency
Figure 20. CMRR vs. Frequency
60 50 40
VS = 5V TA = 25C RL =
160 140 120 100
VS = 5V, +5V, +3V, +2.7V TA = 25C RL =
CLOSED-LOOP GAIN (dB)
30
10 0 -10 -20 -30
00291-018
PSRR (dB)
20
80 60 40 20 0 -20
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 18. Closed-Loop Gain vs. Frequency
Figure 21. PSRR vs. Frequency
VS = 5V TA = 25C MARKER @ 67nV/Hz
50 45
SMALL SIGNAL OVERSHOOT (%)
40 35 30 25 20 15 10 5
VS = +5V VIN = 50mV RL = 100k TA = 25C
-OS +OS
(50nV/Hz/DIV)
00291-019
0
2
4
6
8
10
100 LOAD CAPACITANCE (pF)
1000
FREQUENCY (kHz)
Figure 19. Voltage Noise Density vs. Frequency
Figure 22. Small-Signal Overshoot vs. Load Capacitance
Rev. C | Page 9 of 20
00291-022
0 10
00291-021
-40
-40
00291-020
-10
OP281/OP481
5 VS = 5V VIN = 4V p-p TA = 25C RL =
4.5 VS = 5V 4.0
4
SUPPLY CURRENT/AMPLIFIER (A)
00291-023
MAXIMUM OUTPUT SWING (V p-p)
3.5 3.0 2.5 2.0 1.5 1.0 0.5 -20 0 20 40 60 80 100 120
00291-026
00291-028
3
2
1
0 10
100
1k FREQUENCY (Hz)
10k
100k
0 -40
TEMPERATURE (C)
Figure 23. Maximum Output Swing vs. Frequency
Figure 26. Supply Current/Amplifier vs. Temperature
3
SUPPLY CURRENT/AMPLIFIER (A)
MAXIMUM OUTPUT SWING (V p-p)
VS = 3V VIN = 2V p-p TA = 25C RL =
3.50 3.25 3.00 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0
TA = 25C
2
1
100
1k FREQUENCY (Hz)
10k
100k
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
Figure 24. Maximum Output Swing vs. Frequency
Figure 27. Supply Current/Amplifier vs. Supply Voltage
4.0 VS = 3V 3.5
A2
100 90
0mV
SUPPLY CURRENT/AMPLIFIER (A)
3.0 2.5 2.0 1.5 1.0 0.5 0 -40
VS = 2.5V AV = 1 RL = 100k CL = 50pF TA = 25C
10 0%
50mV
-20 0 20 40 60 80 100 120 TEMPERATURE (C)
00291-025
100s
Figure 25. Supply Current/Amplifier vs. Temperature
Figure 28. Small-Signal Transient Response
Rev. C | Page 10 of 20
00291-027
00291-024
0 10
OP281/OP481
A2
100 90
0mV
VS = 1.35V AV = 1 RL = 100k CL = 50pF TA = 25C
A2
100 90
0.5V
VS = 2.75V AV = 1 RL = 100k CL = 50pF TA = 25C
10 0%
00291-029
10 0%
00291-031
50mV
100s
500mV
100s
Figure 29. Small-Signal Transient Response
Figure 31. Large-Signal Transient Response
A2
100 90
2.5V
VS = 5V AV = 1 RL = 100k CL = 50pF TA = 25C
A2
100 90
2.5V
VS = 5V TA = 25C
10 0%
00291-030
10 0%
00291-032
1V
100s
1V
1V
200s
Figure 30. Large-Signal Transient Response
Figure 32. No Phase Reversal
Rev. C | Page 11 of 20
OP281/OP481
120
A2
100 90
0V
VS = 1.35V RL =
VIN = 1V p-p AT = 2kHz
CHANNEL SEPARATION (dB)
105 90 75 60 45 30 15 0 -15
00291-033
VS = 5V TA = 25C RL =
10 0%
500mV
500mV
50s
1k
10k FREQUENCY (Hz)
100k
1M
Figure 33. Saturation Recovery Time
Figure 35. Channel Separation vs. Frequency
A2
100 90
0V
CIRCUIT = AVOL VS = 2.5V TA = 25C RL =
10 0%
00291-034
1V
500mV
100s
Figure 34. Saturation Recovery Time
Rev. C | Page 12 of 20
00291-035
-30 100
OP281/OP481 APPLICATIONS
THEORY OF OPERATION
The OPx81 family of op amps is comprised of extremely low powered, rail-to-rail output amplifiers, requiring less than 4 A of quiescent current per amplifier. Many other competitors' devices may be advertised as low supply current amplifiers but draw significantly more current as the outputs of these devices are driven to a supply rail. The supply current of the OPx81 remains under 4 A even when the output is driven to either supply rail. Supply currents should meet the specification as long as the inputs and outputs remain within the range of the power supplies. Figure 36 shows a simplified schematic of a single channel for the OPx81. A bipolar differential pair is used in the input stage. PNP transistors are used to allow the input stage to remain linear with the common-mode range extending to ground. This is an important consideration for single-supply applications. The bipolar front end also contributes less noise than a MOS front end with only nanoamps of bias currents. The output of the op amp consists of a pair of CMOS transistors in a common source configuration. This setup allows the output of the amplifier to swing to within millivolts of either supply rail. The headroom required by the output stage is limited by the amount of current being driven into the load. The lower the output current, the closer the output can go to either supply rail. Figure 11, Figure 12, and Figure 13 show the output voltage headroom vs. the load current. This behavior is typical of railto-rail output amplifiers.
VCC
to the lowest possible input signal excursion and can be found using the following formula:
R=
V EE - V IN , MIN 0.5 x 10 -3
where: VEE is the negative power supply for the amplifier. VIN, MIN is the lowest input voltage excursion expected. For example, a single channel of the OPx81 should be used with a single-supply voltage of +5 V if the input signal may go as low as -1 V. Because the amplifier is powered from a single supply, VEE is the ground; therefore, the necessary series resistance should be 2 k.
INPUT OFFSET VOLTAGE
The OPx81 family of op amps was designed for low offset voltages (less than 1 mV).
100k +3V 100k 100k -0.27V + - VOUT
OP281
VIN = 1kHz AT 400mV p-p -0.1V 100k
00291-037
Figure 37. Single OPx81 Channel Configured as a Difference Amplifier Operating at VCM < 0 V
INPUT COMMON-MODE VOLTAGE RANGE
The OPx81 is rated with an input common-mode voltage range from VEE to 1 V less than VCC. However, the op amp can operate with a common-mode voltage that is slightly less than VEE. Figure 37 shows a single OPx81 channel configured as a difference amplifier with a single-supply voltage of 3 V. Negative dc voltages are applied at both input terminals, creating a common-mode voltage that is less than ground. A 400 mV p-p input signal is then applied to the noninverting input. Figure 38 shows the resulting input and output waves. Notice how the output of the amplifier also drops slightly negative without distortion.
0.2ms
OUT +IN -IN
VEE
00291-036
Figure 36. Simplified Schematic of a Single OPx81 Channel
100
VOUT
90
INPUT OVERVOLTAGE PROTECTION
The input stage to the OPx81 family of op amps consists of a PNP differential pair. If the base voltage of either of these input transistors drops to more than 0.6 V below the negative supply, the input ESD protection diodes become forward-biased, and large currents begin to flow. In addition to possibly damaging the device, this creates a phase reversal effect at the output. To prevent this, the input current should be limited to less than 0.5 mA. This can be done by simply placing a resistor in series with the input to the device. The size of the resistor should be proportional
Rev. C | Page 13 of 20
0V VIN
10 0%
00291-038
0.1V
Figure 38. Input and Output Signals with VCM < 0 V
OP281/OP481
CAPACITIVE LOADING
Most low supply current amplifiers have difficulty driving capacitive loads due to the higher currents required from the output stage for such loads. Higher capacitance at the output will increase the amount of overshoot and ringing in the amplifier's step response and may affect the stability of the device. However, through careful design of the output stage and its high phase margin, the OPx81 family can tolerate some degree of capacitive loading. Figure 39 shows the step response of a single channel with a 10 nF capacitor connected at the output. Notice that the overshoot of the output does not exceed more than 10% with such a load, even with a supply voltage of only 3 V.
WINDOW COMPARATOR
The extremely low power supply current demands of the OPx81 family make it ideal for use in long-life battery-powered applications such as a monitoring system. Figure 41 shows a circuit that uses the OP281 as a window comparator.
3V 3V R1 VH A1 D1 10k 5.1k 5.1k VOUT Q1 3V
R2
OP281-A
VIN
2k 3V 3V D2 VL A2
100 90
R3
OP281-B
00291-041
R4
Figure 41. Using the OP281 as a Window Comparator
10 0%
00291-039
Figure 39. Ringing and Overshoot of the Output of the Amplifier
MICROPOWER REFERENCE VOLTAGE GENERATOR
Many single-supply circuits are configured with the circuit biased to half of the supply voltage. In these cases, a false ground reference can be created by using a voltage divider buffered by an amplifier. Figure 40 shows the schematic for such a circuit. The two 1 M resistors generate the reference voltage while drawing only 1.5 A of current from a 3 V supply. A capacitor connected from the inverting terminal to the output of the op amp provides compensation to allow a bypass capacitor to be connected at the reference output. This bypass capacitor helps to establish an ac ground for the reference output. The entire reference generator draws less than 5 A from a 3 V supply source.
3V TO 12V
The threshold limits for the window are set by VH and VL, provided that VH > VL. The output of the first OP281 (A1) will stay at the negative rail, in this case ground, as long as the input voltage is less than VH. Similarly, the output of the second OP281 (A2) will stay at ground as long the input voltage is higher than VL. As long as VIN remains between VL and VH, the outputs of both op amps will be 0 V. With no current flowing in either D1 or D2, the base of Q1 will stay at ground, putting the transistor in cutoff and forcing VOUT to the positive supply rail. If the input voltage rises above VH, the output of A2 stays at ground, but the output of A1 goes to the positive rail and D1 conducts current. This creates a base voltage that turns on Q1 and drives VOUT low. The same condition occurs if VIN falls below VL with A2's output going high and D2 conducting current. Therefore, VOUT is high if the input voltage is between VL and VH, but low if the input voltage moves outside of that range. The R1 and R2 voltage divider sets the upper window voltage, and the R3 and R4 voltage divider sets the lower voltage for the window. For the window comparator to function properly, VH must be a greater voltage than VL.
10k 0.022F
VH = VL =
R2 R1 + R2 R4 R3 + R4
2
8
1M
3
OP281
4
1
100 1F
VREF 1.5V TO 6V
1M
00291-040
1F
The 2 k resistor connects the input voltage of the input terminals to the op amps. This protects the OP281 from possible excess current flowing into the input stages of the devices. D1 and D2 are small-signal switching diodes (1N4446 or equivalent), and Q1 is a 2N2222 or an equivalent NPN transistor.
Figure 40. Single Channel Configured as a Micropower Bias Voltage Generator
Rev. C | Page 14 of 20
OP281/OP481
LOW-SIDE CURRENT MONITOR
In the design of power-supply control circuits, a great deal of design effort is focused on ensuring the long-term reliability of a pass transistor over a wide range of load current conditions. As a result, monitoring and limiting device power dissipation is of primary importance in these designs. Figure 42 shows an example of a 5 V, single-supply current monitor that can be incorporated into the design of a voltage regulator with foldback current limiting or a high current power supply with crowbar protection. The design capitalizes on the OPx81's common-mode range extending to ground. Current is monitored in the power-supply return path, where a 0.1 shunt resistor, RSENSE, creates a very small voltage drop. The voltage at the inverting terminal becomes equal to the voltage at the noninverting terminal through the feedback of Q1, which is a 2N2222 or an equivalent NPN transistor. This makes the voltage drop across R1 equal to the voltage drop across RSENSE. Therefore, the current through Q1 becomes directly proportional to the current through RSENSE, and the output voltage is given by the following equation:
2k VIN = 2V p-p A1 R1 100k 3V R2 100k 3V A2 FULL-WAVE RECTIFIED OUTPUT
OP281-A
OP281-B
Figure 43. Single-Supply Full-Wave and Half-Wave Rectifiers Using an OP281
100 90
SCALE 0.1V/DIV
10 0%
SCALE 0.1ms/DIV
00291-044
R2 x R SENSE x I L VOUT = V EE - R1
The voltage drop across R2 increases as IL increases; therefore, VOUT decreases if a higher supply current is sensed. For the element values shown, the VOUT transfer characteristic is -2.5 V/A, decreasing from VEE.
5V R2 2.49k VOUT Q1 5V
Figure 44. Full-Wave Rectified Signal
R1 100 0.1 RSENSE
SINGLE CHANNEL OPx81 RETURN TO GROUND
00291-042
Amplifier A1 is used as a voltage follower that tracks the input voltage only when it is greater than 0 V. This provides a halfwave rectification of the input signal to the noninverting terminal of Amplifier A2. When A1's output is following the input, the inverting terminal of A2 also follows the input from the virtual ground between the inverting and noninverting terminals of A2. With no potential difference across R1, no current flows through either R1 or R2; therefore, the output of A2 also follows the input. When the input voltage goes below 0 V, the noninverting terminal of A2 becomes 0 V. This makes A2 work as an inverting amplifier with a gain of 1 and provides a full-wave rectified version of the input signal. A 2 k resistor in series with A1's noninverting input protects the device when the input signal becomes less than ground.
Figure 42. Low-Side Load Current Monitor
LOW VOLTAGE HALF-WAVE AND FULL-WAVE RECTIFIERS
Because of its quick overdrive recovery time, an OP281 can be configured as a full-wave rectifier for low frequency (<500 Hz) applications. Figure 43 shows the schematic.
BATTERY-POWERED TELEPHONE HEADSET AMPLIFIER
Figure 45 shows how the OP281 can be used as a two-way amplifier in a telephone headset. One side of the OP281 can be used as an amplifier for the microphone, and the other side can be used to drive the speaker. A typical telephone headset uses a 600 speaker and an electret microphone that requires a supply voltage and a biasing resistor.
Rev. C | Page 15 of 20
00291-043
HALF-WAVE RECTIFIED OUTPUT
OP281/OP481
0.1F 3V 2.2k 1F 1M ELECTRET 1M MIC 11k 3V 300k 3V 1F MIC OUT
OP281-A
audio bandwidth. A 2.2 k resistor is used to bias the electret microphone. This resistor value may vary depending on the specifications of the microphone. The output of the microphone is ac-coupled to the noninverting terminal of the op amp. Two 1 M resistors are used to provide the dc offset for single-supply use. The OP281-B amplifier (see Figure 45) can provide up to 15 dB of gain for the headset speaker. Incoming audio signals are ac-coupled to a 10 k potentiometer that is used to adjust the volume. Again, two 1 M resistors provide the dc offset with a 1 F capacitor establishing an ac ground for the volume-control potentiometer. Because the OP281 is a rail-to-rail output amplifier, it would have difficulty driving a 600 speaker directly. Here, a Class AB buffer is used to isolate the load from the amplifier and to provide the necessary current to drive the speaker. By placing the buffer in the feedback loop of the op amp, crossover distortion can be minimized. Q1 and Q2 should have minimum betas of 100. The 600 speaker is ac-coupled to the emitters to prevent quiescent current from flowing into the speaker. The 1 F coupling capacitor makes an equivalent high-pass filter cutoff at 265 Hz with a 600 load attached. Again, this does not pose a problem because it is outside the frequency range for telephone audio signals. The circuit in Figure 45 draws around 250 A of current. The Class AB buffer has a quiescent current of 140 A, and roughly 100 A is drawn by the microphone itself. A CR2032 3 V lithium battery has a life expectancy of 160 mA hours, which means this circuit can run continuously for 640 hours on a single battery.
1F 10k
50k 3V
20k 3V INPUT 1F 10k POT. 1M 1F 1M Q1 1F
3V
OP281-B
Q2 20k
00291-045
600 SPEAKER
Figure 45. Two-Way Amplifier in a Battery-Powered Telephone Headset
The OP281-A op amp provides about 29 dB of gain for audio signals coming from the microphone. The gain is set by the 300 k and 11 k resistors. The gain bandwidth product of the amplifier is 95 kHz, which yields a -3 dB rolloff at 3.4 kHz for the set gain of 28. This is acceptable because telephone audio is band limited for 300 kHz to 3 kHz signals. If higher gain is required for the microphone, an additional gain stage should be used, because adding more gain to the OP281 would limit the
Rev. C | Page 16 of 20
OP281/OP481 OUTLINE DIMENSIONS
5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497)
8 1 5 4
6.20 (0.2441) 5.80 (0.2284)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) 0.25 (0.0099) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45
0.51 (0.0201) 0.31 (0.0122)
COMPLIANT TO JEDEC STANDARDS MS-012-A A CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 46. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches)
8.75 (0.3445) 8.55 (0.3366)
14 1 8 7
4.00 (0.1575) 3.80 (0.1496)
6.20 (0.2441) 5.80 (0.2283)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.31 (0.0122)
1.75 (0.0689) 1.35 (0.0531) SEATING PLANE
0.50 (0.0197) 0.25 (0.0098) 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157)
45
COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
Figure 47. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches)
Rev. C | Page 17 of 20
060606-A
OP281/OP481
3.10 3.00 2.90
8
5
4.50 4.40 4.30
1 4
6.40 BSC
PIN 1 0.65 BSC 0.15 0.05 COPLANARITY 0.10 0.30 0.19 1.20 MAX SEATING 0.20 PLANE 0.09
8 0
0.75 0.60 0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AA
Figure 48. 8-Lead Thin Shrink Small Outline Package [TSSOP] (RU-8) Dimensions shown in millimeters
5.10 5.00 4.90
14
8
4.50 4.40 4.30
1 7
6.40 BSC
PIN 1 1.05 1.00 0.80 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19
0.20 0.09
SEATING COPLANARITY PLANE 0.10
8 0
0.75 0.60 0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 49. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters
ORDERING GUIDE
Model OP281GRU-REEL OP281GRUZ-REEL 1 OP281GS OP281GS-REEL OP281GS-REEL7 OP281GSZ1 OP281GSZ-REEL1 OP281GSZ-REEL71 OP481GRU-REEL OP481GRUZ-REEL1 OP481GS OP481GS-REEL OP481GS-REEL7 OP481GSZ1 OP481GSZ-REEL1 OP481GSZ-REEL71
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead TSSOP 8-Lead TSSOP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 14-Lead TSSOP 14-Lead TSSOP 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N
Package Option RU-8 RU-8 R-8 R-8 R-8 R-8 R-8 R-8 RU-14 RU-14 R-14 R-14 R-14 R-14 R-14 R-14
Z = RoHS Compliant Part.
Rev. C | Page 18 of 20
OP281/OP481 NOTES
Rev. C | Page 19 of 20
OP281/OP481 NOTES
(c)1996-2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00291-0-10/07(C)
Rev. C | Page 20 of 20

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